Outcome of the Event:
After completion of the FDP the participants will be able to:
1. Floor planning, Placement, Routing, Physical Verification
2. do research on VLSI back-end design
Description:
Department of Electronics and Communication Engineering conducted a Two Day Training Programme on “Design of Integrated Circuits using Microwind Tools” from 30-31 August 2023 to faculty. Mr.S.Rambabu, Application Engineer, TechFLUENT Solutions Private Limited, Hyderabad delivered the theory session on “Basics of ASIC Design and ASIC Vs FPGAs, Full Custom Flow and Semi Custom Design Flow, Latest Advancements VLSI Industry” and lab session on “Semi Custom Design Flow” which includes “Introduction to Microwind tools” and lab session on “Pyxis schematic and ELDO Simulator”. He also delivered the the lab sessions on “RTL to GDS Flow” which includes Reading Verilog Netlist in Pyxis Layout, Floor-Planning Placement & Routing (PR), Physical Verification with Calibre (DRC, LVS, PEX) and “Cell Based Design” which includes Floor planning, Placement, Routing, Physical Verification Using Industry Standard Calibre Tool ( DRC, LVS, xRC). A total of 12 ECE Department faculty members attended to this Training Programme.