CMOS Mixed Signal VLSI Design

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Name of FDP/Training Programme

CMOS Mixed Signal VLSI Design

Resource Persons

IIT, Kharagpur Faculty

Internal Benifited

35

External Benifited

7

Total Benifited

42

Outcome of the Event

Sponsoring Authority

Depatment of ECE

In order to enhance the knowledge of faculty collegues who are teaching subjects like VLSi Design, Fundamentals of Radio  frequency Engineering, Design and implementation of Mixed Signal Circuits and Systems and Analog front end Design  a two week ISTE STTP was conducted by department of ECE in association with IIT Kharagpur.

The scope of the programme is extended to Analog front end for sensor interface:  which deals with instrumentation amplifier, chopper, variable Gain Amplifier. In addition to this, it deals with Data converters such as SAR and pipelined ADC. What is more, it provide a brief view of Digital VLSI circuits and system Design.